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» The Design and Implementation of a Certifying Compiler
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TVLSI
2008
121views more  TVLSI 2008»
13 years 8 months ago
Area-Efficient Arithmetic Expression Evaluation Using Deeply Pipelined Floating-Point Cores
Recently, it has become possible to implement floating-point cores on field-programmable gate arrays (FPGAs) to provide acceleration for the myriad applications that require high-p...
Ronald Scrofano, Ling Zhuo, Viktor K. Prasanna
VLSID
2009
IEEE
170views VLSI» more  VLSID 2009»
14 years 9 months ago
Code Transformations for TLB Power Reduction
The Translation Look-aside Buffer (TLB) is a very important part in the hardware support for virtual memory management implementation of high performance embedded systems. The TLB...
Reiley Jeyapaul, Sandeep Marathe, Aviral Shrivasta...
POPL
2007
ACM
14 years 9 months ago
PADS/ML: a functional data description language
Massive amounts of useful data are stored and processed in ad hoc formats for which common tools like parsers, printers, query engines and format converters are not readily availa...
Artem Gleyzer, David Walker, Kathleen Fisher, Mary...
OOPSLA
2009
Springer
14 years 3 months ago
Thorn: robust, concurrent, extensible scripting on the JVM
Scripting languages enjoy great popularity due their support for rapid and exploratory development. They typically have lightweight syntax, weak data privacy, dynamic typing, powe...
Bard Bloom, John Field, Nathaniel Nystrom, Johan &...
DELTA
2010
IEEE
14 years 1 months ago
Notations for Multiphase Pipelines
— FPGAs, (Field-Programmable Gate Arrays) are often used for embedded image processing applications. Parallelism, and in particular pipelining, is the most suitable architecture ...
Christopher T. Johnston, Donald G. Bailey, Paul J....