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CORR
2010
Springer
106views Education» more  CORR 2010»
15 years 6 months ago
Real Time and Energy Efficient Transport Protocol for Wireless Sensor Networks
---------------------------------------------------ABSTRACT-----------------------------------------------Reliable transport protocols such as TCP are tuned to perform well in trad...
S. Ganesh, R. Amutha
DAMON
2007
Springer
16 years 4 days ago
Pipelined hash-join on multithreaded architectures
Multi-core and multithreaded processors present both opportunities and challenges in the design of database query processing algorithms. Previous work has shown the potential for ...
Philip Garcia, Henry F. Korth
ISCA
1996
IEEE
120views Hardware» more  ISCA 1996»
15 years 10 months ago
Missing the Memory Wall: The Case for Processor/Memory Integration
Current high performance computer systems use complex, large superscalar CPUs that interface to the main memory through a hierarchy of caches and interconnect systems. These CPU-c...
Ashley Saulsbury, Fong Pong, Andreas Nowatzyk
DAC
2004
ACM
16 years 7 months ago
Multi-profile based code compression
Code compression has been shown to be an effective technique to reduce code size in memory constrained embedded systems. It has also been used as a way to increase cache hit ratio...
Eduardo Wanderley Netto, Rodolfo Azevedo, Paulo Ce...
DSN
2009
IEEE
16 years 22 days ago
Decoupling Dynamic Information Flow Tracking with a dedicated coprocessor
Dynamic Information Flow Tracking (DIFT) is a promising security technique. With hardware support, DIFT prevents a wide range of attacks on vulnerable software with minimal perfor...
Hari Kannan, Michael Dalton, Christos Kozyrakis