867 search results - page 30 / 174 » The Design and Performance of a Conflict-Avoiding Cache |
CF
2007
ACM
2007
ACM
Adaptive VP decay: making value predictors leakage-efficient designs for high performance processors
14 years 15 days ago
Energy-efficient microprocessor designs are one of the major concerns in both high performance and embedded processor domains. Furthermore, as process technology advances toward d...
ISPASS
2007
IEEE
14 years 2 months ago
2007
IEEE
We have studied DRAM-level prefetching for the fully buffered DIMM (FB-DIMM) designed for multi-core processors. FB-DIMM has a unique two-level interconnect structure, with FB-DIM...
ISCA
2009
IEEE
14 years 3 months ago
2009
IEEE
While microprocessor designers turn to multicore architectures to sustain performance expectations, the dramatic increase in parallelism of such architectures will put substantial...
USENIX
1996
13 years 9 months ago
1996
: This paper discussesthedesignandperformance of a hierarchical proxy-cache designed to make Internet information systems scale better. The design was motivated by our earlier trac...
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
Modern embedded processors use data caches with higher and higher degrees of associativity in order to increase performance. A set–associative data cache consumes a significant...