867 search results - page 99 / 174 » The Design and Performance of a Conflict-Avoiding Cache |
159
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GIS
2009
ACM
15 years 10 months ago
2009
ACM
The in-network query processing paradigm in sensor networks postulates that a query is routed among sensors and collects the answers from the sensors on its trajectory. It works f...
139
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MICRO
2000
IEEE
15 years 10 months ago
2000
IEEE
Silent store instructions write values that exactly match the values that are already stored at the memory address that is being written. A recent study reveals that significant ...
177
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HPCA
1999
IEEE
15 years 10 months ago
1999
IEEE
Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application-specific optimizations through...
171
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CF
2009
ACM
16 years 18 days ago
2009
ACM
As we reach the limits of single-core computing, we are promised more and more cores in our systems. Modern architectures include many performance counters per core, but few or no...
148
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DAC
2000
ACM
16 years 7 months ago
2000
ACM
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...