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DSD
2006
IEEE
131views Hardware» more  DSD 2006»
13 years 11 months ago
Designing Efficient Irregular Networks for Heterogeneous Systems-on-Chip
Abstract-- Networks-on-Chip will serve as the central integration platform in future complex SoC designs, composed of a large number of heterogeneous processing resources. Most res...
Christian Neeb, Norbert Wehn
ISCAPDCS
2007
13 years 9 months ago
Architectural requirements of parallel computational biology applications with explicit instruction level parallelism
—The tremendous growth in the information culture, efficient digital searches are needed to extract and identify information from huge data. The notion that evolution in silicon ...
Naeem Zafar Azeemi
CSMR
2004
IEEE
13 years 11 months ago
Supporting Architectural Restructuring by Analyzing Feature Models
In order to lower the risk, reengineering projects aim at high reuse rates. Therefore, tasks like architectural restructuring have to be performed in a way that developed new syst...
Ilian Pashov, Matthias Riebisch, Ilka Philippow
MICRO
1992
IEEE
128views Hardware» more  MICRO 1992»
13 years 11 months ago
MISC: a Multiple Instruction Stream Computer
This paper describes a single chip Multiple Instruction Stream Computer (MISC) capable of extracting instruction level parallelism from a broad spectrum of programs. The MISC arch...
Gary S. Tyson, Matthew K. Farrens, Andrew R. Plesz...
ICRA
2007
IEEE
524views Robotics» more  ICRA 2007»
14 years 2 months ago
Concept and Design of A Fully Autonomous Sewer Pipe Inspection Mobile Robot "KANTARO"
— In current conventional method, the sewer pipe inspection is undertaken using a cable-tethered robot with an on-board video camera system, completely, tele-operated by human op...
Amir Ali Forough Nassiraei, Yoshinori Kawamura, Al...