274 search results - page 52 / 55 » The Design of the YAP Compiler: An Optimizing Compiler for L... |
DAC
2002
ACM
14 years 9 months ago
2002
ACM
In this paper, we evaluate an adaptive loop parallelization strategy (i.e., a strategy that allows each loop nest to execute using different number of processors if doing so is be...
DAC
2005
ACM
13 years 10 months ago
2005
ACM
This paper proposes a rapid and accurate evaluation scheme for cycle counts of a pipelined processor using evaluation reuse technique. Since exploration of an optimal processor is...
LCTRTS
2007
Springer
14 years 2 months ago
2007
Springer
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
ASE
2004
13 years 8 months ago
2004
er is concerned with an abstract exploration of code mobility constructs designed for use in settings where the level of granularity associated with the mobile units exhibits sign...
EMSOFT
2007
Springer
14 years 2 months ago
2007
Springer
There is increasing interest in using general-purpose operating systems, such as Linux, on embedded platforms. It is especially important in embedded systems to use memory effici...