100 search results - page 8 / 20 » The Effect of Instruction Set Complexity on Program Size and... |
163
Voted
ASPLOS
2004
ACM
15 years 9 months ago
2004
ACM
Increased integration in the form of multiple processor cores on a single die, relatively constant die sizes, shrinking power envelopes, and emerging applications create a new cha...
134
Voted
ASPLOS
2004
ACM
15 years 9 months ago
2004
ACM
Dynamic information flow tracking is a hardware mechanism to protect programs against malicious attacks by identifying spurious information flows and restricting the usage of sp...
149
Voted
JUCS
2000
15 years 3 months ago
2000
: This paper presents an evaluation of our Scheduled Dataflow (SDF) Processor. Recent focus in the field of new processor architectures is mainly on VLIW (e.g. IA-64), superscalar ...
132
Voted
PPOPP
1997
ACM
15 years 7 months ago
1997
ACM
Global addressing of shared data simplifies parallel programming and complements message passing models commonly found in distributed memory machines. A number of programming sys...
144
Voted
PLDI
2012
ACM
13 years 6 months ago
2012
ACM
Modern architectures implement relaxed memory models which may reorder memory operations or execute them non-atomically. Special instructions called memory fences are provided, al...