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ICPADS
1998
IEEE
13 years 11 months ago
Symbolic Partitioning and Scheduling of Parameterized Task Graphs
The DAG-based task graph model has been found effective in scheduling for performance prediction and optimization of parallel applications. However the scheduling complexity and s...
Michel Cosnard, Emmanuel Jeannot, Tao Yang
DAC
2002
ACM
14 years 8 months ago
Energy estimation and optimization of embedded VLIW processors based on instruction clustering
Aim of this paper is to propose a methodology for the definition of an instruction-level energy estimation framework for VLIW (Very Long Instruction Word) processors. The power mo...
Andrea Bona, Mariagiovanna Sami, Donatella Sciuto,...
TPDS
2010
144views more  TPDS 2010»
13 years 5 months ago
Performance Evaluation of Dynamic Speculative Multithreading with the Cascadia Architecture
—Thread-level parallelism (TLP) has been extensively studied in order to overcome the limitations of exploiting instruction-level parallelism (ILP) on high-performance superscala...
David A. Zier, Ben Lee
MICRO
1999
IEEE
131views Hardware» more  MICRO 1999»
13 years 11 months ago
Value Prediction for Speculative Multithreaded Architectures
The speculative multithreading paradigm (speculative threadlevel parallelism) is based on the concurrent execution of control-speculative threads. The efficiency of microarchitect...
Pedro Marcuello, Jordi Tubella, Antonio Gonz&aacut...
ASPLOS
2008
ACM
13 years 9 months ago
Communication optimizations for global multi-threaded instruction scheduling
The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several lim...
Guilherme Ottoni, David I. August