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ICDE
2010
IEEE
249views Database» more  ICDE 2010»
14 years 4 months ago
PARINET: A tunable access method for in-network trajectories
— In this paper we propose PARINET, a new access method to efficiently retrieve the trajectories of objects moving in networks. The structure of PARINET is based on a combination...
Iulian Sandu Popa, Karine Zeitouni, Vincent Oria, ...
ISQED
2009
IEEE
94views Hardware» more  ISQED 2009»
14 years 4 months ago
Simultaneous buffer and interlayer via planning for 3D floorplanning
As technology advances, the interconnect delay among modules plays dominant role in chip performance. Buffer insertion, as a traditional approach to reduce wire delay in 2D ICs, i...
Xu He, Sheqin Dong, Yuchun Ma, Xianlong Hong
PDP
2009
IEEE
14 years 4 months ago
Phoenix: A Runtime Environment for High Performance Computing on Chip Multiprocessors
Abstract—Execution of applications on upcoming highperformance computing (HPC) systems introduces a variety of new challenges and amplifies many existing ones. These systems will...
Avneesh Pant, Hassan Jafri, Volodymyr V. Kindraten...
COMPSAC
2009
IEEE
14 years 3 months ago
The Design and Implementation of a Bare PC Email Server
— This paper presents the architecture, design and implementation of an email server that runs on a bare PC without an operating system or hard-disk. In addition to providing sta...
George H. Ford Jr., Ramesh K. Karne, Alexander L. ...
DATE
2009
IEEE
133views Hardware» more  DATE 2009»
14 years 3 months ago
Architectural support for low overhead detection of memory violations
Violations in memory references cause tremendous loss of productivity, catastrophic mission failures, loss of privacy and security, and much more. Software mechanisms to detect me...
Saugata Ghose, Latoya Gilgeous, Polina Dudnik, Ane...