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DATE
2010
IEEE
144views Hardware» more  DATE 2010»
14 years 1 months ago
A reconfigurable hardware for one bit transform based multiple reference frame Motion Estimation
—Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. One bit transform (1BT) based ME algorithms have low comput...
Abdulkadir Akin, G. Sayilar, Ilker Hamzaoglu
FPGA
2005
ACM
195views FPGA» more  FPGA 2005»
14 years 2 months ago
Sparse Matrix-Vector multiplication on FPGAs
Floating-point Sparse Matrix-Vector Multiplication (SpMXV) is a key computational kernel in scientific and engineering applications. The poor data locality of sparse matrices sig...
Ling Zhuo, Viktor K. Prasanna
ISNN
2005
Springer
14 years 2 months ago
A SIMD Neural Network Processor for Image Processing
Abstract. Artificial Neural Networks (ANNs) and image processing requires massively parallel computation of simple operator accompanied by heavy memory access. Thus, this type of ...
Dongsun Kim, Hyunsik Kim, Hongsik Kim, Gunhee Han,...
CISIS
2011
IEEE
12 years 8 months ago
Improving Scheduling Techniques in Heterogeneous Systems with Dynamic, On-Line Optimisations
—Computational performance increasingly depends on parallelism, and many systems rely on heterogeneous resources such as GPUs and FPGAs to accelerate computationally intensive ap...
Marcin Bogdanski, Peter R. Lewis, Tobias Becker, X...
ARC
2010
Springer
387views Hardware» more  ARC 2010»
14 years 3 months ago
Optimising Memory Bandwidth Use for Matrix-Vector Multiplication in Iterative Methods
Computing the solution to a system of linear equations is a fundamental problem in scientific computing, and its acceleration has drawn wide interest in the FPGA community [1–3]...
David Boland, George A. Constantinides