6834 search results - page 24 / 1367 » The Fail-Heterogeneous Architectural Model |
ICASSP
2011
IEEE
13 years 1 months ago
2011
IEEE
For high-data-rate applications, turbo-like iterative decoders are implemented with parallel hardware architecture. However, to achieve high throughput, concurrent accesses to each...
EMSOFT
2010
Springer
13 years 7 months ago
2010
Springer
Automotive architectures consist of multiple electronic control units (ECUs) which run distributed control applications. Such ECUs are connected to sensors and actuators and commu...
CODES
1996
IEEE
14 years 2 months ago
1996
IEEE
Successful """tiprocessor system design for complex realtime embedded applications requires powerful and comprehensive. yet cost-effective. productive. and maintain...
DATE
2005
IEEE
13 years 11 months ago
2005
IEEE
Transaction Level Modeling (TLM) approach is used to meet the simulation speed as well as cycle accuracy for large scale SoC performance analysis. We implemented a transaction-lev...
JSA
2007
2007
Application of deterministic and stochastic Petri-Nets for performance modeling of NoC architectures
13 years 9 months ago
The design of appropriate communication architectures for complex Systems-on-Chip (SoC) is a challenging task. One promising alternative to solve these problems are Networks-on-Ch...