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MASCOTS
1994
13 years 8 months ago
The Feasibility of Using Compression to Increase Memory System Performance
We investigate the feasibility of using instruction compression at some level in a multi-level memory hierarchy to increase memory system performance. Compression e ectively incre...
Jenlong Wang, Russell W. Quong
CASES
2006
ACM
14 years 26 days ago
Automated compile-time and run-time techniques to increase usable memory in MMU-less embedded systems
Random access memory (RAM) is tightly-constrained in many embedded systems. This is especially true for the least expensive, lowest-power embedded systems, such as sensor network ...
Lan S. Bai, Lei Yang, Robert P. Dick
DAC
2006
ACM
14 years 26 days ago
High-performance operating system controlled memory compression
This article describes a new software-based on-line memory compression algorithm for embedded systems and presents a method of adaptively managing the uncompressed and compressed ...
Lei Yang, Haris Lekatsas, Robert P. Dick
WMPI
2004
ACM
14 years 9 days ago
A compressed memory hierarchy using an indirect index cache
Abstract. The large and growing impact of memory hierarchies on overall system performance compels designers to investigate innovative techniques to improve memory-system efficienc...
Erik G. Hallnor, Steven K. Reinhardt
SIGMETRICS
2011
ACM
198views Hardware» more  SIGMETRICS 2011»
13 years 1 months ago
Memory Trace Compression and Replay for SPMD Systems using Extended PRSDs?
Concurrency levels in large-scale supercomputers are rising exponentially, and shared-memory nodes with hundreds of cores and non-uniform memory access latencies are expected with...
Sandeep Budanur, Frank Mueller, Todd Gamblin