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» The Filter Cache: An Energy Efficient Memory Structure
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CF
2007
ACM
13 years 11 months ago
Adaptive VP decay: making value predictors leakage-efficient designs for high performance processors
Energy-efficient microprocessor designs are one of the major concerns in both high performance and embedded processor domains. Furthermore, as process technology advances toward d...
Juan M. Cebrian, Juan L. Aragón, José...
ADHOC
2004
127views more  ADHOC 2004»
13 years 7 months ago
A distributed and adaptive signal processing approach to exploiting correlation in sensor networks
We propose a novel approach to reducing energy consumption in sensor networks using a distributed adaptive signal processing framework and efficient algorithm 1 . While the topic o...
Jim Chou, Dragan Petrovic, Kannan Ramchandran
ISCA
2005
IEEE
144views Hardware» more  ISCA 2005»
14 years 1 months ago
Scalable Load and Store Processing in Latency Tolerant Processors
Memory latency tolerant architectures support thousands of in-flight instructions without scaling cyclecritical processor resources, and thousands of useful instructions can compl...
Amit Gandhi, Haitham Akkary, Ravi Rajwar, Srikanth...
ICDE
2008
IEEE
137views Database» more  ICDE 2008»
14 years 8 months ago
XML Prefiltering as a String Matching Problem
We propose a new technique for the efficient search and navigation in XML documents and streams. This technique takes string matching algorithms designed for efficient keyword sear...
Christoph Koch, Stefanie Scherzinger, Michael Schm...
ISLPED
2010
ACM
231views Hardware» more  ISLPED 2010»
13 years 7 months ago
3D-nonFAR: three-dimensional non-volatile FPGA architecture using phase change memory
Memories play a key role in FGPAs in the forms of both programming bits and embedded memory blocks. FPGAs using non-volatile memories have been the focus of attention with zero bo...
Yibo Chen, Jishen Zhao, Yuan Xie