Sciweavers

237 search results - page 21 / 48
» The Garp Architecture and C Compiler
Sort
View
IPPS
2007
IEEE
14 years 4 months ago
Optimizing the Fast Fourier Transform on a Multi-core Architecture
The rapid revolution in microprocessor chip architecture due to multicore technology is presenting unprecedented challenges to the application developers as well as system softwar...
Long Chen, Ziang Hu, Junmin Lin, Guang R. Gao
DATE
2011
IEEE
223views Hardware» more  DATE 2011»
13 years 1 months ago
Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach
Current processors are optimized for average case performance, often leading to a high worst-case execution time (WCET). Many architectural features that increase the average case...
Martin Schoeberl, Pascal Schleuniger, Wolfgang Puf...
VL
2005
IEEE
107views Visual Languages» more  VL 2005»
14 years 3 months ago
Navigating Software Architectures with Constant Visual Complexity
Abstract— Visualizing software architecture faces the challenges of both data complexity and visual complexity. This paper presents an approach for visualizing software architect...
Wanchun Li, Peter Eades, Seok-Hee Hong
DAC
2004
ACM
14 years 10 months ago
A novel approach for flexible and consistent ADL-driven ASIP design
Architecture description languages (ADL) have been established to aid the design of application-specific instruction-set processors (ASIP). Their main contribution is the automati...
Achim Nohl, Gunnar Braun, Hanno Scharwächter,...
FPGA
2011
ACM
401views FPGA» more  FPGA 2011»
13 years 1 months ago
LegUp: high-level synthesis for FPGA-based processor/accelerator systems
In this paper, we introduce a new open source high-level synthesis tool called LegUp that allows software techniques to be used for hardware design. LegUp accepts a standard C pro...
Andrew Canis, Jongsok Choi, Mark Aldham, Victor Zh...