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ISVLSI
2006
IEEE
126views VLSI» more  ISVLSI 2006»
14 years 1 months ago
QUKU: A Two-Level Reconfigurable Architecture
FPGAs have been used for prototyping of ASICs, for low-volume ASIC replacement and for systems requiring in-field hardware upgrades. However, the potential to use dynamic reconfig...
Sunil Shukla, Neil W. Bergmann, Jürgen Becker
DAGSTUHL
2006
13 years 8 months ago
Denial of Service Protection with Beaver
We present Beaver, a method and architecture to "build dams" to protect servers from Denial of Service (DoS) attacks. Beaver allows efficient filtering of DoS traffic us...
Gal Badishi, Idit Keidar, Amir Herzberg, Oleg Roma...
CAL
2008
13 years 7 months ago
Hierarchical Instruction Register Organization
This paper analyzes a range of architectures for efficient delivery of VLIW instructions for embedded media kernels. The analysis takes an efficient Filter Cache as a baseline and ...
David Black-Schaffer, James D. Balfour, William J....
CF
2008
ACM
13 years 9 months ago
Exact multi-pattern string matching on the cell/b.e. processor
String searching is the computationally intensive kernel of many security and network applications like search engines, intrusion detection systems, virus scanners and spam filter...
Daniele Paolo Scarpazza, Oreste Villa, Fabrizio Pe...
ORDER
2008
82views more  ORDER 2008»
13 years 7 months ago
Profinite Heyting Algebras
For a Heyting algebra A, we show that the following conditions are equivalent: (i) A is profinite; (ii) A is finitely approximable, complete, and completely join-prime generated; (...
Guram Bezhanishvili, Nick Bezhanishvili