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» The High Level Architecture for Simulations
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IPPS
2008
IEEE
14 years 3 months ago
Lattice Boltzmann simulation optimization on leading multicore platforms
We present an auto-tuning approach to optimize application performance on emerging multicore architectures. The methodology extends the idea of searchbased performance optimizatio...
Samuel Williams, Jonathan Carter, Leonid Oliker, J...
DAC
1994
ACM
14 years 29 days ago
Optimizing Resource Utilization and Testability Using Hot Potato Techniques
This paper introduces hot potato high level synthesis transformation techniques. These techniques add deflection operations in a computation in such a way that a specific goal is ...
Miodrag Potkonjak, Sujit Dey
ASYNC
2003
IEEE
86views Hardware» more  ASYNC 2003»
14 years 2 months ago
A High-Speed Clockless Serial Link Transceiver
We present a high-speed, clockless, serial link transceiver for inter-chip communication in asynchronous VLSI systems. Serial link transceivers achieve high offchip data rates by ...
John Teifel, Rajit Manohar
SAMOS
2009
Springer
14 years 3 months ago
Implementing Fine/Medium Grained TLP Support in a Many-Core Architecture
We believe that future many-core architectures should support a simple and scalable way to execute many threads that are generated by parallel programs. A good candidate to impleme...
Roberto Giorgi, Zdravko Popovic, Nikola Puzovic
TOOLS
1999
IEEE
14 years 1 months ago
Component Frameworks - A Case Study
This paper reports on an effort to use both the system theoretic DEVS (discrete event simulation) formalism and the JavaBeans component model as a basis for a componentbased discr...
Herbert Praehofer, Johannes Sametinger, Alois Stri...