2424 search results - page 14 / 485 » The High Level Architecture for Simulations |
DATE
2000
IEEE
14 years 1 months ago
2000
IEEE
This paper presents a new approach on combined highlevel synthesis and partitioning for FPGA-based multi-chip emulation systems. The goal is to synthesize a prototype with maximal...
FPL
2006
Springer
14 years 8 days ago
2006
Springer
This paper presents preliminary work exploring adaptive field programmable gate arrays (AFPGAs). An AFPGA is adaptative in the sense that the functionality of subcircuits placed o...
HICSS
2002
IEEE
14 years 1 months ago
2002
IEEE
Recently, Microsoft took a lead in the development of a standard for peer-to-peer network connectivity of various intelligent appliances, wireless devices and PCs. It is called th...
ISSS
1997
IEEE
14 years 24 days ago
1997
IEEE
This paper presents a novel source-level dynamic analysis methodology and tool for High-Level Synthesis (HLS). It not only for the first time enables HLS to offer source-level de...
DEXAW
2006
IEEE
14 years 2 months ago
2006
IEEE
One of the pre-requisites for the realization of the Semantic Web vision are matching techniques which are capable of handling the open, dynamic and heterogeneous nature of the se...