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JPDC
2000
141views more  JPDC 2000»
13 years 8 months ago
A System for Evaluating Performance and Cost of SIMD Array Designs
: SIMD arrays are likely to become increasingly important as coprocessors in domain specific systems as architects continue to leverage RAM technology in their design. The problem ...
Martin C. Herbordt, Jade Cravy, Renoy Sam, Owais K...
ISMVL
2002
IEEE
120views Hardware» more  ISMVL 2002»
14 years 1 months ago
An Impact of Introducing Multi-Level Signals to a Bandpass Cascaded Delta-Sigma Modulator
An impact of introducing multi-level signals to a bandpass delta-sigma modulator (DSM), which is of particular interest for wireless communications applications, has been investig...
Takao Waho, Shin-ya Kobayashi, Koji Matsuura
DSRT
2000
IEEE
14 years 1 months ago
A Generic Rollback Manager for Optimistic HLA Simulations
This paper describes the addition of an extra piece of software, a rollback manager, to implement state saving and rollback management for optimistic federates in the High Level A...
Fernando Vardânega, Carlos Maziero
DAC
2008
ACM
14 years 9 months ago
Transistor level gate modeling for accurate and fast timing, noise, and power analysis
Current source based cell models are becoming a necessity for accurate timing and noise analysis at 65nm and below. Voltage waveform shapes are increasingly more difficult to repr...
S. Raja, F. Varadi, Murat R. Becer, Joao Geada