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IPPS
1999
IEEE
15 years 10 months ago
Dynamically Scheduling the Trace Produced During Program Execution into VLIW Instructions
VLIW machines possibly provide the most direct way to exploit instruction level parallelism; however, they cannot be used to emulate current general-purpose instruction set archit...
Alberto Ferreira de Souza, Peter Rounce
160
Voted
ISCAS
2007
IEEE
141views Hardware» more  ISCAS 2007»
16 years 11 days ago
Towards a GBit/s Programmable Decoder for LDPC Convolutional Codes
Abstract— We analyze the decoding algorithm for regular timeinvariant LDPC convolutional codes as a 3D signal processing scheme and derive several parallelization concepts, which...
Emil Matús, Marcos B. S. Tavares, Marcel Bi...
ICANN
2009
Springer
15 years 10 months ago
Scalable Neural Networks for Board Games
Learning to solve small instances of a problem should help in solving large instances. Unfortunately, most neural network architectures do not exhibit this form of scalability. Our...
Tom Schaul, Jürgen Schmidhuber
FC
2010
Springer
175views Cryptology» more  FC 2010»
15 years 7 months ago
Cryptographic Cloud Storage
We consider the problem of building a secure cloud storage service on top of a public cloud infrastructure where the service provider is not completely trusted by the customer. We...
Seny Kamara, Kristin Lauter
QOSA
2010
Springer
15 years 9 months ago
Parameterized Reliability Prediction for Component-Based Software Architectures
Critical properties of software systems, such as reliability, should be considered early in the development, when they can govern crucial architectural design decisions. A number o...
Franz Brosch, Heiko Koziolek, Barbora Buhnova, Ral...