— Memory-intensive applications present unique challenges to an ASIC designer in terms of the choice of memory organization, memory size requirements, bandwidth and access latenc...
Explicit Data Graph Execution (EDGE) architectures offer the possibility of high instruction-level parallelism with energy efficiency. In EDGE architectures, the compiler breaks ...
Aaron Smith, Jon Gibson, Bertrand A. Maher, Nichol...
In this paper, we present a new hybrid optical burst switch architecture (HOBS) that takes advantage of the pre-transmission idle time during lightpath establishment. In dynamic c...
Abstract-- Traditionally, conflict resolution in an inputbuffered switch is solved by finding a matching between inputs and outputs per time slot. To do this, a switch not only nee...
—Most of the contemporary research in wireless networks is primarily based on simulations or in-house small scale experimental setups that are highly customized for the experimen...
Sachin Ganu, Maximilian Ott, Ivan Seskar, Dipankar...