2424 search results - page 23 / 485 » The High Level Architecture for Simulations |
IROS
2009
IEEE
14 years 3 months ago
2009
IEEE
— In this paper the compliant low level control of a biologically inspired control architecture suited for bipedal dynamic walking robots is presented. It consists of elastic mec...
ASAP
2006
IEEE
13 years 10 months ago
2006
IEEE
The paper starts presents the work initially carried out by Queen's University and RSRE (now Qinetiq) in the development of advanced architectures and microchips based on sys...
ANSS
2004
IEEE
14 years 12 days ago
2004
IEEE
To enable optimizations in memory access behavior of high performance applications, cache monitoring is a crucial process. Simulation of cache hardware is needed in order to allow...
CCGRID
2001
IEEE
14 years 8 days ago
2001
IEEE
TACO (Topologies and Collections) is a template library that introduces the flavour of distributed data parallel processing by means of reusable topology classes and C++ s. This p...
EH
2004
IEEE
14 years 11 days ago
2004
IEEE
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...