2424 search results - page 35 / 485 » The High Level Architecture for Simulations |
TVLSI
2008
13 years 8 months ago
2008
Much effort in register transfer level (RTL) design has been devoted to developing "push-button" types of tools. However, given the highly complex nature, and lack of con...
SASO
2008
IEEE
14 years 3 months ago
2008
IEEE
In this paper, we describe an application-level emulator for P2P systems with a special focus on high reproducibility. We achieve reproduciblity by taking control over the schedul...
DAC
2002
ACM
14 years 9 months ago
2002
ACM
A central problem in functional verification is to check that a circuit block is producing correct outputs while enforcing that the environment is providing legal inputs. To attac...
VLSID
2005
IEEE
2005
IEEE
Formal Methods for Analyzing the Completeness of an Assertion Suite against a High-Level Fault Model
14 years 2 months ago
One of the emerging challenges in formal property verification (FPV) technology is the problem of deciding whether sufficient properties have been written to cover the design in...
OOPSLA
1998
Springer
14 years 27 days ago
1998
Springer
Dynamic information collected as a software system executes can help software engineers perform some tasks on a system more effectively. To interpret the sizable amount of data ge...