2424 search results - page 406 / 485 » The High Level Architecture for Simulations |
143
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DAC
2007
ACM
16 years 7 months ago
2007
ACM
Twisted differential line structure can effectively reduce crosstalk noise on global bus, which foresees a wide applicability. However, measured performance based on fabricated ci...
168
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MOBICOM
2006
ACM
15 years 12 months ago
2006
ACM
This paper presents a highly efficient and accurate link-quality measurement framework, called EAR (Efficient and Accurate link-quality monitoR), for multi-hop wireless mesh net...
140
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SIGCOMM
2004
ACM
15 years 11 months ago
2004
ACM
−Buffered multistage interconnection networks offer one of the most scalable and cost-effective approaches to building high capacity routers. Unfortunately, the performance of su...
160
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IPPS
2008
IEEE
16 years 10 days ago
2008
IEEE
Pipelined SRAM-based algorithmic solutions have become competitive alternatives to TCAMs (ternary content addressable memories) for high throughput IP lookup. Multiple pipelines c...
170
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DATE
2010
IEEE
15 years 11 months ago
2010
IEEE
—Multi-Processor System-on-Chips (MPSoCs) exploit task-level parallelism to achieve high computation throughput, but concurrent memory accesses from multiple PEs may cause memory...