The convergence of TV and new features such as Internet and games, requires a generic media-processing platform, that enables simultaneous execution of very diverse tasks, ranging...
Egbert G. T. Jaspers, Erik B. van der Tol, Peter H...
An evolvable hardware (EHW) architecture for high-speed pattern recognition has been proposed. For a complex face image recognition task, the system demonstrates (in simulation) an...
In this paper, we present a high-level power modeling technique to estimate the power consumption of reconfigurable devices such as complex programmable logic devices (CPLDs) and ...
—While array structures are a significant source of power dissipation, there is a lack of accurate high-level power estimators that account for varying array circuit implementat...
Mahesh Mamidipaka, Kamal S. Khouri, Nikil D. Dutt,...
The High Level Architecture (HLA) is a standard for the interoperability and reuse of simulation components, referred to as federates. Large scale HLA-compliant simulations are bu...