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» The High Level Architecture for Simulations
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IPPS
2002
IEEE
14 years 1 months ago
System-Level Analysis for MPEG-4 Decoding on a Multi-Processor Architecture
The convergence of TV and new features such as Internet and games, requires a generic media-processing platform, that enables simultaneous execution of very diverse tasks, ranging...
Egbert G. T. Jaspers, Erik B. van der Tol, Peter H...
EVOW
2007
Springer
14 years 2 months ago
An Online EHW Pattern Recognition System Applied to Face Image Recognition
An evolvable hardware (EHW) architecture for high-speed pattern recognition has been proposed. For a complex face image recognition task, the system demonstrates (in simulation) an...
Kyrre Glette, Jim Torresen, Moritoshi Yasunaga
ICCD
2001
IEEE
124views Hardware» more  ICCD 2001»
14 years 5 months ago
High-Level Power Modeling of CPLDs and FPGAs
In this paper, we present a high-level power modeling technique to estimate the power consumption of reconfigurable devices such as complex programmable logic devices (CPLDs) and ...
Li Shang, Niraj K. Jha
ICCAD
2003
IEEE
190views Hardware» more  ICCAD 2003»
14 years 5 months ago
IDAP: A Tool for High Level Power Estimation of Custom Array Structures
—While array structures are a significant source of power dissipation, there is a lack of accurate high-level power estimators that account for varying array circuit implementat...
Mahesh Mamidipaka, Kamal S. Khouri, Nikil D. Dutt,...
PADS
2006
ACM
14 years 2 months ago
A Framework for Robust HLA-based Distributed Simulations
The High Level Architecture (HLA) is a standard for the interoperability and reuse of simulation components, referred to as federates. Large scale HLA-compliant simulations are bu...
Dan Chen, Stephen John Turner, Wentong Cai