2424 search results - page 444 / 485 » The High Level Architecture for Simulations |
HPCA
2009
IEEE
14 years 9 months ago
2009
IEEE
As the last-level on-chip caches in chip-multiprocessors increase in size, the physical locality of on-chip data becomes important for delivering high performance. The non-uniform...
ICC
2009
IEEE
14 years 3 months ago
2009
IEEE
—The DVB-H standard has been defined to provide digital video broadcast to mobile handheld devices. However, without a request channel, a handheld device may encounter data loss...
ICRA
2008
IEEE
14 years 3 months ago
2008
IEEE
— In this paper, we lay the groundwork for extending our previously developed ASyMTRe architecture to enable constructivist learning for multi-robot team tasks. The ASyMTRe archi...
INFOCOM
2007
IEEE
14 years 3 months ago
2007
IEEE
Next-generation high-end Network Processors (NP) must address demands from both diversified applications and ever-increasing traffic pressure. One major challenge is to design an e...
INFOCOM
2006
IEEE
14 years 2 months ago
2006
IEEE
— Three-stage non-blocking switching fabrics are the next step in scaling current crossbar switches to many hundreds or few thousands of ports. Congestion (output contention) man...