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HPCA
2009
IEEE
16 years 6 months ago
PageNUCA: Selected policies for page-grain locality management in large shared chip-multiprocessor caches
As the last-level on-chip caches in chip-multiprocessors increase in size, the physical locality of on-chip data becomes important for delivering high performance. The non-uniform...
Mainak Chaudhuri
ICC
2009
IEEE
108views Communications» more  ICC 2009»
16 years 12 days ago
Spatial and Temporal Packet Recovery Schemes for DVB-H Systems through IP-Relay Wireless Networks
—The DVB-H standard has been defined to provide digital video broadcast to mobile handheld devices. However, without a request channel, a handheld device may encounter data loss...
Wen-Hsin Yang, You-Chiun Wang, Yu-Chee Tseng, Bao-...
ICRA
2008
IEEE
119views Robotics» more  ICRA 2008»
16 years 2 days ago
Towards schema-based, constructivist robot learning: Validating an evolutionary search algorithm for schema chunking
— In this paper, we lay the groundwork for extending our previously developed ASyMTRe architecture to enable constructivist learning for multi-robot team tasks. The ASyMTRe archi...
Yifan Tang, Lynne E. Parker
INFOCOM
2007
IEEE
15 years 12 months ago
On the Extreme Parallelism Inside Next-Generation Network Processors
Next-generation high-end Network Processors (NP) must address demands from both diversified applications and ever-increasing traffic pressure. One major challenge is to design an e...
Lei Shi, Yue Zhang 0006, Jianming Yu, Bo Xu, Bin L...
INFOCOM
2006
IEEE
15 years 11 months ago
Scheduling in Non-Blocking Buffered Three-Stage Switching Fabrics
— Three-stage non-blocking switching fabrics are the next step in scaling current crossbar switches to many hundreds or few thousands of ports. Congestion (output contention) man...
Nikolaos Chrysos, Manolis Katevenis