2424 search results - page 45 / 485 » The High Level Architecture for Simulations |
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
—This paper presents a tool for exploring different parallelization options for an application. It can be used to quickly find a high-quality match between an application and a ...
LCTRTS
1998
Springer
14 years 27 days ago
1998
Springer
Abstract. Previously published methods for estimation of the worstcase execution time on contemporary processors with complex pipelines and multi-level memory hierarchies result in...
GLOBECOM
2010
IEEE
13 years 6 months ago
2010
IEEE
Cloud computing data centers are becoming increasingly popular for the provisioning of computing resources. The cost and operating expenses of data centers have skyrocketed with th...
RT
2001
Springer
14 years 1 months ago
2001
Springer
This paper presents a technique for representing and displaying high dynamic-range texture maps (HDRTMs) using current graphics hardware. Dynamic range in real-world environments o...
DAC
2000
ACM
14 years 9 months ago
2000
ACM
Substrate noise caused by large digital circuits will degrade the performance of analog circuits located on the same substrate. To simulate this performance degradation, the total...