Sciweavers

2424 search results - page 66 / 485
» The High Level Architecture for Simulations
Sort
View
JPDC
2006
141views more  JPDC 2006»
13 years 8 months ago
M-TREE: A high efficiency security architecture for protecting integrity and privacy of software
Secure processor architectures enable new sets of applications such as commercial grid computing, software copy protection and secure mobile agents by providing secure computing e...
Chenghuai Lu, Tao Zhang, Weidong Shi, Hsien-Hsin S...
ANCS
2008
ACM
13 years 10 months ago
Low power architecture for high speed packet classification
Today's routers need to perform packet classification at wire speed in order to provide critical services such as traffic billing, priority routing and blocking unwanted Inte...
Alan Kennedy, Xiaojun Wang, Zhen Liu, Bin Liu
CODES
1999
IEEE
14 years 1 months ago
An MPEG-2 decoder case study as a driver for a system level design methodology
We present a case study on the design of a heterogeneous architecture for MPEG-2 video decoding. The primary objective of the case study is the validation of the SPADE methodology...
Pieter van der Wolf, Paul Lieverse, Mudit Goel, Da...
VLSID
2005
IEEE
167views VLSI» more  VLSID 2005»
14 years 9 months ago
A Methodology and Tooling Enabling Application Specific Processor Design
This paper presents a highly efficient processor design methodology based on the LISA 2.0 language. Typically the architecture design phase is dominated by an iterative processor ...
Andreas Hoffmann, Frank Fiedler, Achim Nohl, Suren...
SC
2009
ACM
14 years 3 months ago
Enabling high-fidelity neutron transport simulations on petascale architectures
The UNIC code is being developed as part of the DOE’s Nuclear Energy Advanced Modeling and Simulation (NEAMS) program. UNIC is an unstructured, deterministic neutron transport c...
Dinesh K. Kaushik, Micheal Smith, Allan Wollaber, ...