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ISCAS
2007
IEEE
158views Hardware» more  ISCAS 2007»
14 years 5 months ago
Adaptive Low/High Voltage Swing CMOS Driver for On-Chip Interconnects
Abstract— This paper reports the design of a high performance, adaptive low/high swing CMOS driver circuit (mj–driver) suitable for driving of global interconnects with large c...
José C. García, Juan A. Montiel-Nels...
CCGRID
2010
IEEE
13 years 12 months ago
High Performance Data Transfer in Grid Environment Using GridFTP over InfiniBand
GridFTP, designed by using the Globus XIO framework, is one of the most popular methods for performing data transfers in the Grid environment. But the performance of GridFTP in WA...
Hari Subramoni, Ping Lai, Rajkumar Kettimuthu, Dha...
IPPS
2003
IEEE
14 years 4 months ago
An Executable Analytical Performance Evaluation Approach for Early Performance Prediction
Percolation has recently been proposed as a key component of an advanced program execution model for future generation high-end machines featuring adaptive data/code transformatio...
Adeline Jacquet, Vincent Janot, Clement Leung, Gua...
TVLSI
2008
164views more  TVLSI 2008»
13 years 10 months ago
Dynamically Configurable Bus Topologies for High-Performance On-Chip Communication
The on-chip communication architecture is a major determinant of overall performance in complex System-on-Chip (SoC) designs. Since the communication requirements of SoC components...
Krishna Sekar, Kanishka Lahiri, Anand Raghunathan,...
JSS
2007
120views more  JSS 2007»
13 years 10 months ago
The design and evaluation of path matching schemes on compressed control flow traces
A control flow trace captures the complete sequence of dynamically executed basic blocks and function calls. It is usually of very large size and therefore commonly stored in com...
Yongjing Lin, Youtao Zhang, Rajiv Gupta