289 search results - page 51 / 58 » The Impact of Combined Equalization on the Performance of MC... |
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...
ISCA
2010
IEEE
14 years 24 days ago
2010
IEEE
As technology scales ever further, device unreliability is creating excessive complexity for hardware to maintain the illusion of perfect operation. In this paper, we consider whe...
PPOPP
2010
ACM
14 years 5 months ago
2010
ACM
Effective data placement strategies can enhance the performance of data-intensive applications implemented on high end computing clusters. Such strategies can have a significant i...
CLUSTER
2007
IEEE
14 years 2 months ago
2007
IEEE
— Various mechanisms for fault-tolerance (FT) are used today in order to reduce the impact of failures on application execution. In the case of system failure, standard FT mechan...
RTSS
2006
IEEE
14 years 1 months ago
2006
IEEE
In most operating systems, the handling of interrupts is typically performed within the address space of the kernel. Moreover, interrupt handlers are invoked asynchronously during...