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MICRO
2008
IEEE
148views Hardware» more  MICRO 2008»
14 years 2 months ago
Coordinated management of multiple interacting resources in chip multiprocessors: A machine learning approach
—Efficient sharing of system resources is critical to obtaining high utilization and enforcing system-level performance objectives on chip multiprocessors (CMPs). Although sever...
Ramazan Bitirgen, Engin Ipek, José F. Mart&...
ISCA
1993
IEEE
117views Hardware» more  ISCA 1993»
14 years 4 days ago
Evaluation of Release Consistent Software Distributed Shared Memory on Emerging Network Technology
We evaluate the e ect of processor speed, network bandwidth, and software overhead on the performance of release-consistent software distributed shared memory. We examine ve di er...
Sandhya Dwarkadas, Peter J. Keleher, Alan L. Cox, ...
ISQED
2011
IEEE
309views Hardware» more  ISQED 2011»
12 years 11 months ago
Modeling and analyzing NBTI in the presence of Process Variation
With continuous scaling of transistors in each technology generation, NBTI and Process Variation (PV) have become very important silicon reliability problems for the microprocesso...
Taniya Siddiqua, Sudhanva Gurumurthi, Mircea R. St...
SPAA
2010
ACM
14 years 26 days ago
Implementing and evaluating nested parallel transactions in software transactional memory
Transactional Memory (TM) is a promising technique that simplifies parallel programming for shared-memory applications. To date, most TM systems have been designed to efficientl...
Woongki Baek, Nathan Grasso Bronson, Christos Kozy...
PDPTA
2004
13 years 9 months ago
Design of a Real-Time Scheduler for Kahn Process Networks on Multiprocessor Systems
High-throughput real-time systems require non-standard and costly hardware and software solutions. Modern workstation can represent a credible alternative to develop realtime inte...
Javed Dulloo, Philippe Marquet