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» The Implicit Pipeline Method
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133
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DAC
2009
ACM
16 years 4 months ago
A DVS-based pipelined reconfigurable instruction memory
Energy consumption is of significant concern in battery operated embedded systems. In the processors of such systems, the instruction cache consumes a significant fraction of the ...
Zhiguo Ge, Tulika Mitra, Weng-Fai Wong
HPCA
2001
IEEE
16 years 4 months ago
A Delay Model and Speculative Architecture for Pipelined Routers
This paper introduces a router delay model that accurately models key aspects of modern routers. The model accounts for the pipelined nature of contemporary routers, the specific ...
Li-Shiuan Peh, William J. Dally
PATMOS
2007
Springer
15 years 9 months ago
A Statistical Approach to the Timing-Yield Optimization of Pipeline Circuits
Abstract. The continuous miniaturization of semiconductor devices imposes serious threats to design robustness against process variations and environmental fluctuations. Modern ci...
Chin-Hsiung Hsu, Szu-Jui Chou, Jie-Hong Roland Jia...
133
Voted
TC
2008
15 years 3 months ago
Self-Adaptive Configuration of Visualization Pipeline Over Wide-Area Networks
Next-generation scientific applications require the capability to visualize large archival data sets or on-going computer simulations of physical and other phenomena over wide-area...
Qishi Wu, Jinzhu Gao, Mengxia Zhu, Nageswara S. V....
115
Voted
IPPS
2007
IEEE
15 years 10 months ago
Pipelining Tradeoffs of Massively Parallel SuperCISC Hardware Functions
Parallel processing using multiple processors is a well-established technique to accelerate many different classes of applications. However, as the density of chips increases, ano...
Colin J. Ihrig, Justin Stander, Alex K. Jones