202 search results - page 12 / 41 » The Instruction Execution Mechanism for Responsive Multithre... |
ASPLOS
2000
ACM
13 years 12 months ago
2000
ACM
Processors execute the full dynamic instruction stream to arrive at the final output of a program, yet there exist shorter instruction streams that produce the same overall effec...
HPCA
2007
IEEE
14 years 8 months ago
2007
IEEE
If-conversion is a compiler technique that reduces the misprediction penalties caused by hard-to-predict branches, transforming control dependencies into data dependencies. Althou...
ISCA
2006
IEEE
13 years 7 months ago
2006
IEEE
Conventional relaxed memory ordering techniques follow a proactive model: at a synchronization point, a processor makes its own updates to memory available to other processors by ...
CF
2006
ACM
14 years 1 months ago
2006
ACM
There is a continuous research effort devoted to overcome the memory wall problem. Prefetching is one of the most frequently used techniques. A prefetch mechanism anticipates the ...
HPCA
2004
IEEE
14 years 8 months ago
2004
IEEE
This paper proposes and evaluates hardware mechanisms for supporting prescient instruction prefetch--an approach to improving single-threaded application performance by using help...