202 search results - page 3 / 41 » The Instruction Execution Mechanism for Responsive Multithre... |
HPCA
2001
IEEE
14 years 7 months ago
2001
IEEE
Mispredicted branches and loads that miss in the cache cause the majority of retirement stalls experienced by sequential processors; we call these critical instructions. Despite t...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
Reduced energy consumption is one of the most important design goals for embedded application domains like wireless, multimedia and biomedical. Instruction memory hierarchy has be...
CAL
2005
13 years 7 months ago
2005
Previous research on runahead execution took it for granted as a prefetch-only technique. Even though the results of instructions independent of an L2 miss are correctly computed d...
APCSAC
2001
IEEE
13 years 11 months ago
2001
IEEE
Java bytecodes can be executed with the following three methods: a Java interpretor running on a particular machine interprets bytecodes; a Just-In-Time (JIT) compiler translates ...
ICPP
2002
IEEE
14 years 13 days ago
2002
IEEE
Conventional instruction fetch mechanisms fetch contiguous blocks of instructions in each cycle. They are difficult to scale since taken branches make it hard to increase the siz...