202 search results - page 6 / 41 » The Instruction Execution Mechanism for Responsive Multithre... |
IPPS
2010
IEEE
13 years 4 months ago
2010
IEEE
Very Long Instruction Word (VLIW) processors are a popular choice in embedded domain due to their hardware simplicity, low cost and low power consumption. Simultaneous MultiThreadi...
HPCA
2008
IEEE
14 years 7 months ago
2008
IEEE
Simultaneous Multithreading (SMT) attempts to keep a dynamically scheduled processor's resources busy with work from multiple independent threads. Threads with longlatency st...
EUROMICRO
1998
IEEE
13 years 11 months ago
1998
IEEE
In this paper we present a novel processor microarchitecture that relieves three of the most important bottlenecks of superscalar processors: the serialization imposed by true dep...
IPPS
2008
IEEE
14 years 1 months ago
2008
IEEE
Abstract—Many studies have shown that load imbalancing causes significant performance degradation in High Performance Computing (HPC) applications. Nowadays, Multi-Threaded (MT1...
ISPASS
2005
IEEE
14 years 1 months ago
2005
IEEE
Today’s general-purpose processors are increasingly using multithreading in order to better leverage the additional on-chip real estate available with each technology generation...