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TVLSI
2010
13 years 4 months ago
Variation-Aware System-Level Power Analysis
Abstract-- The operational characteristics of integrated circuits based on nanoscale semiconductor technology are expected to be increasingly affected by variations in the manufact...
Saumya Chandra, Kanishka Lahiri, Anand Raghunathan...
TVLSI
2010
13 years 4 months ago
Architectural Enhancement and System Software Support for Program Code Integrity Monitoring in Application-Specific Instruction-
Program code in a computer system can be altered either by malicious security attacks or by various faults in microprocessors. At the instruction level, all code modifications are ...
Hai Lin, Yunsi Fei, Xuan Guan, Zhijie Jerry Shi
TVLSI
2010
13 years 4 months ago
C-Pack: A High-Performance Microprocessor Cache Compression Algorithm
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...
TWC
2010
13 years 4 months ago
Cooperative Decode-and-Forward ARQ Relaying: Performance Analysis and Power Optimization
Abstract--In this paper we develop a new analytical methodology for the evaluation of the outage probability of cooperative decode-and-forward (DF) automatic-repeat-request (ARQ) r...
Sangkook Lee, Weifeng Su, Stella N. Batalama, John...
TWC
2010
13 years 4 months ago
Pi: a practical incentive protocol for delay tolerant networks
Delay Tolerant Networks (DTNs) are a class of networks characterized by lack of guaranteed connectivity, typically low frequency of encounters between DTN nodes and long propagatio...
Rongxing Lu, Xiaodong Lin, Haojin Zhu, Xuemin Shen...