3872 search results - page 662 / 775 » The Java memory model |
PPOPP
2010
ACM
14 years 7 months ago
2010
ACM
Many large-scale parallel programs follow a bulk synchronous parallel (BSP) structure with distinct computation and communication phases. Although the communication phase in such ...
EUROGRAPHICS
2010
Eurographics
14 years 7 months ago
2010
Eurographics
We present a new technique to implement operators that modify the topology of polygonal meshes at intersections and self-intersections. Depending on the modification strategy, th...
ICCD
2001
IEEE
14 years 7 months ago
2001
IEEE
The general-purpose precise interrupt mechanism, which has long been used to handle exceptional conditions that occur infrequently, is now being used increasingly often to handle ...
ICCAD
2008
IEEE
14 years 7 months ago
2008
IEEE
The ability to integrate diverse components such as processor cores, memories, custom hardware blocks and complex network-on-chip (NoC) communication frameworks onto a single chip...
ISPASS
2010
IEEE
14 years 5 months ago
2010
IEEE
Abstract—We generate and provide miniature synthetic benchmark clones for modern workloads to solve two pre-silicon design challenges, namely: 1) huge simulation time (weeks to m...