Sciweavers

3872 search results - page 664 / 775
» The Java memory model
Sort
View
IEEEPACT
2008
IEEE
14 years 4 months ago
Leveraging on-chip networks for data cache migration in chip multiprocessors
Recently, chip multiprocessors (CMPs) have arisen as the de facto design for modern high-performance processors, with increasing core counts. An important property of CMPs is that...
Noel Eisley, Li-Shiuan Peh, Li Shang
IPPS
2008
IEEE
14 years 4 months ago
High-speed string searching against large dictionaries on the Cell/B.E. Processor
Our digital universe is growing, creating exploding amounts of data which need to be searched, protected and filtered. String searching is at the core of the tools we use to curb...
Daniele Paolo Scarpazza, Oreste Villa, Fabrizio Pe...
SUTC
2008
IEEE
14 years 4 months ago
Hovering Information - Self-Organising Information that Finds Its Own Storage
A piece of Hovering Information is a geo-localized information residing in a highly dynamic environment such as a mobile ad hoc network. This information is attached to a geograph...
Alfredo A. Villalba Castro, Giovanna Di Marzo Seru...
ISLPED
2006
ACM
117views Hardware» more  ISLPED 2006»
14 years 4 months ago
Energy/power breakdown of pipelined nanometer caches (90nm/65nm/45nm/32nm)
As transistors continue to scale down into the nanometer regime, device leakage currents are becoming the dominant cause of power dissipation in nanometer caches, making it essent...
Samuel Rodríguez, Bruce L. Jacob
PLDI
2005
ACM
14 years 3 months ago
Checking type safety of foreign function calls
We present a multi-lingual type inference system for checking type safety across a foreign function interface. The goal of our system is to prevent foreign function calls from int...
Michael Furr, Jeffrey S. Foster