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ISCA
2006
IEEE
144views Hardware» more  ISCA 2006»
13 years 8 months ago
Conditional Memory Ordering
Conventional relaxed memory ordering techniques follow a proactive model: at a synchronization point, a processor makes its own updates to memory available to other processors by ...
Christoph von Praun, Harold W. Cain, Jong-Deok Cho...
IPPS
2005
IEEE
14 years 2 months ago
The SDVM - An Approach for Future Adaptive Computer Clusters
The Self Distributing Virtual Machine (SDVM) is a parallel computing machine which consists of a cluster of customary computers. The participating machines may have different comp...
Jan Haase, Frank Eschmann, Klaus Waldschmidt
IEEEPACT
2009
IEEE
14 years 3 months ago
Flextream: Adaptive Compilation of Streaming Applications for Heterogeneous Architectures
Increasing demand for performance and efficiency has driven the computer industry toward multicore systems. These systems have become the industry standard in almost all segments...
Amir Hormati, Yoonseo Choi, Manjunath Kudlur, Rodr...
IFIP
2004
Springer
14 years 1 months ago
Ensuring Termination by Typability
A term terminates if all its reduction sequences are of finite length. We show four type systems that ensure termination of well-typed π-calculus processes. The systems are obtai...
Yuxin Deng, Davide Sangiorgi
SPAA
2012
ACM
11 years 11 months ago
Memory-mapping support for reducer hyperobjects
hyperobjects (reducers) provide a linguistic abstraction for dynamic multithreading that allows different branches of a parallel program to maintain coordinated local views of the...
I.-Ting Angelina Lee, Aamir Shafi, Charles E. Leis...