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CONCUR
2006
Springer
13 years 11 months ago
Model Checking Quantified Computation Tree Logic
Propositional temporal logic is not suitable for expressing properties on the evolution of dynamically allocated entities over time. In particular, it is not possible to trace such...
Arend Rensink
ITC
2003
IEEE
127views Hardware» more  ITC 2003»
14 years 2 months ago
Using Logic Models To Predict The Detection Behavior Of Statistical Timing Defects
In this paper, we study the possibility of using logic defect-level prediction models to predict the detection behavior of statistical timing defects. We compare two known logic m...
Li-C. Wang, Angela Krstic, Leonard Lee, Kwang-Ting...
ATS
2005
IEEE
164views Hardware» more  ATS 2005»
13 years 11 months ago
A Family of Logical Fault Models for Reversible Circuits
Reversibility is of interest in achieving extremely low power dissipation; it is also an inherent design requirement of quantum computation. Logical fault models for conventional ...
Ilia Polian, Thomas Fiehn, Bernd Becker, John P. H...
FROCOS
2011
Springer
12 years 9 months ago
Tailoring Temporal Description Logics for Reasoning over Temporal Conceptual Models
Temporal data models have been used to describe how data can evolve in the context of temporal databases. Both the Extended Entity-Relationship (EER) model and the Unified Modelli...
Alessandro Artale, Roman Kontchakov, Vladislav Ryz...
ECRTS
1999
IEEE
14 years 1 months ago
Timed automaton models for simple programmable logic controllers
We give timed automaton models for a class of Programmable Logic Controller (PLC) applications, that are programmed in a simple fragment of the language Instruction Lists as defin...
Angelika Mader, Hanno Wupper