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112
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GLVLSI
2002
IEEE
122views VLSI» more  GLVLSI 2002»
15 years 8 months ago
A compact delay model for series-connected MOSFETs
A compact delay model for series connected MOSFETs has been derived. This model enables accurate prediction of worst-case delay of different logic families such as dynamic logic. ...
Kaveh Shakeri, James D. Meindl
124
Voted
EUROGP
2007
Springer
116views Optimization» more  EUROGP 2007»
15 years 10 months ago
Genetic Programming with Fitness Based on Model Checking
Abstract. Model checking is a way of analysing programs and programlike structures to decide whether they satisfy a list of temporal logic statements describing desired behaviour. ...
Colin G. Johnson
FUIN
2008
103views more  FUIN 2008»
15 years 3 months ago
LDYIS: a Framework for Model Checking Security Protocols
We present a formalism for the automatic verification of security protocols based on multi-agent systems semantics. We give the syntax and semantics of a temporal-epistemic securit...
Alessio Lomuscio, Wojciech Penczek
114
Voted
ATAL
2003
Springer
15 years 9 months ago
Model checking agentspeak
This paper introduces AgentSpeak(F), a variation of the BDI logic programming language AgentSpeak(L) intended to permit the model-theoretic verification of multi-agent systems. A...
Rafael H. Bordini, Michael Fisher, Carmen Pardavil...
165
Voted
TMC
2012
13 years 6 months ago
Modeling and Performance Evaluation of Backoff Misbehaving Nodes in CSMA/CA Networks
—Backoff misbehavior, in which a wireless node deliberately manipulates its backoff time, can induce significant network problems, such as severe unfairness and denial-of-servic...
Zhuo Lu, Wenye Wang, Cliff Wang