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MICRO
2002
IEEE
173views Hardware» more  MICRO 2002»
14 years 3 months ago
Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks
Multimedia processing on embedded devices requires an architecture that leads to high performance, low power consumption, reduced design complexity, and small code size. In this p...
Christoforos E. Kozyrakis, David A. Patterson
ISCAS
2007
IEEE
76views Hardware» more  ISCAS 2007»
14 years 4 months ago
In Vitro Epileptic Seizure Prediction Microsystem
— The architecture and VLSI implementation of an epileptic seizure prediction microsystem are presented. The microsystem comprises a neural recording interface and a seizure pred...
J. N. Y. Aziz, Rafal Karakiewicz, Roman Genov, A. ...
VLDB
2004
ACM
102views Database» more  VLDB 2004»
14 years 3 months ago
PIVOT and UNPIVOT: Optimization and Execution Strategies in an RDBMS
PIVOT and UNPIVOT, two operators on tabular data that exchange rows and columns, enable data transformations useful in data modeling, data analysis, and data presentation. They ca...
Conor Cunningham, Goetz Graefe, César A. Ga...
TACAS
2001
Springer
160views Algorithms» more  TACAS 2001»
14 years 2 months ago
Hardware/Software Co-Design Using Functional Languages
In previous work we have developed and prototyped a silicon compiler which translates a functional language (SAFL) into hardware. Here we present a SAFL-level program transformati...
Alan Mycroft, Richard Sharp
MCMASTER
1993
14 years 2 months ago
A Systolizing Compilation Scheme for Nested Loops with Linear Bounds
With the recent advances in massively parallel programmable processor networks, methods for the infusion of massive MIMD parallelism into programs have become increasingly relevant...
Michael Barnett, Christian Lengauer