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» The Modelling of Embedded Systems Using HASoC
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RTCSA
1999
IEEE
14 years 3 months ago
Pipeline Timing Analysis Using a Trace-Driven Simulator
In this paper we present a technique for Worst-Case Execution Time WCET analysis for pipelined processors. Our technique uses a standard simulator instead of special-purpose pipel...
Jakob Engblom, Andreas Ermedahl
SIES
2010
IEEE
13 years 8 months ago
Verification of a CAN bus model in SystemC with functional coverage
Abstract--Many heterogeneous embedded systems, for example industrial automation and automotive applications, require hard-real time constraints to be exhaustively verified - which...
Christoph Kuznik, Gilles B. Defo, Wolfgang Mü...
FTDCS
2004
IEEE
14 years 2 months ago
Smart Phone: An Embedded System for Universal Interactions
In this paper, we present a system architecture that allows users to interact with embedded systems located in their proximity using Smart Phones. We have identified four models o...
Liviu Iftode, Cristian Borcea, Nishkam Ravi, Porli...
IEEECIT
2010
IEEE
13 years 9 months ago
Introducing Hardware-in-Loop Concept to the Hardware/Software Co-design of Real-time Embedded Systems
—As the need for embedded systems to interact with other systems is growing fast, we see great opportunities in introducing the hardware-in-the-loop technique to the field of ha...
Dogan Fennibay, Arda Yurdakul, Alper Sen
ASPDAC
1995
ACM
111views Hardware» more  ASPDAC 1995»
14 years 2 months ago
A hardware-software co-simulator for embedded system design and debugging
One of the interesting problems in hardware-software co-design is that of debugging embedded software in conjunction with hardware. Currently, most software designers wait until a...
A. Ghosh, M. Bershteyn, R. Casley, C. Chien, A. Ja...