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ASPLOS
2000
ACM
13 years 12 months ago
An Analysis of Operating System Behavior on a Simultaneous Multithreaded Architecture
This paper presents the first analysis of operating system execution on a simultaneous multithreaded (SMT) processor. While SMT has been studied extensively over the past 6 years,...
Joshua Redstone, Susan J. Eggers, Henry M. Levy
ENTCS
2002
98views more  ENTCS 2002»
13 years 7 months ago
Verified Code Generation for Embedded Systems
Digital signal processors provide specialized SIMD (single instruction multiple data) operations designed to dramatically increase performance in embedded systems. While these ope...
Sabine Glesner, Rubino Geiß, Boris Boesler
IISWC
2006
IEEE
14 years 1 months ago
Load Instruction Characterization and Acceleration of the BioPerf Programs
The load instructions of some of the bioinformatics applications in the BioPerf suite possess interesting characteristics: only a few static loads cover almost the entire dynamic ...
Paruj Ratanaworabhan, Martin Burtscher
LCTRTS
2001
Springer
14 years 11 hour ago
ILP-based Instruction Scheduling for IA-64
The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...
Daniel Kästner, Sebastian Winkel
DAC
2009
ACM
14 years 8 months ago
A DVS-based pipelined reconfigurable instruction memory
Energy consumption is of significant concern in battery operated embedded systems. In the processors of such systems, the instruction cache consumes a significant fraction of the ...
Zhiguo Ge, Tulika Mitra, Weng-Fai Wong