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» The New IEEE-754 Standard for Floating Point Arithmetic
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ARITH
2009
IEEE
14 years 2 months ago
A Decimal Floating-Point Adder with Decoded Operands and a Decimal Leading-Zero Anticipator
The IEEE 754-2008 Standard for Floating-Point Arithmetic was officially approved this year. One of the most
Liang-Kai Wang, Michael J. Schulte
ARITH
1999
IEEE
13 years 12 months ago
Correctness Proofs Outline for Newton-Raphson Based Floating-Point Divide and Square Root Algorithms
This paper describes a study of a class of algorithms for the floating-point divide and square root operations, based on the Newton-Raphson iterative method. The two main goals we...
Marius A. Cornea-Hasegan, Roger A. Golliver, Peter...
ARITH
2011
IEEE
12 years 7 months ago
Fast Ripple-Carry Adders in Standard-Cell CMOS VLSI
— This paper presents a number of new high-radix ripple-carry adder designs based on Ling’s addition technique and a recently-published expansion thereof. The proposed adders a...
Neil Burgess
TPHOL
1999
IEEE
13 years 12 months ago
A Machine-Checked Theory of Floating Point Arithmetic
Abstract. Intel is applying formal verification to various pieces of mathematical software used in Merced, the first implementation of the new IA-64 architecture. This paper discus...
John Harrison
DSD
2003
IEEE
97views Hardware» more  DSD 2003»
14 years 27 days ago
A Quadruple Precision and Dual Double Precision Floating-Point Multiplier
Double precision floating-point arithmetic is inadequate for many scientific computations. This paper presents the design of a quadruple precision floating-point multiplier tha...
Ahmet Akkas, Michael J. Schulte