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ISBI
2009
IEEE
14 years 3 months ago
Multi GPU Implementation of Iterative Tomographic Reconstruction Algorithms
Although iterative reconstruction techniques (IRTs) have been shown to produce images of superior quality over conventional filtered back projection (FBP) based algorithms, the u...
Byunghyun Jang, David R. Kaeli, Synho Do, Homer H....
GCB
2009
Springer
481views Biometrics» more  GCB 2009»
14 years 3 months ago
CUDA-based Multi-core Implementation of MDS-based Bioinformatics Algorithms
: Solving problems in bioinformatics often needs extensive computational power. Current trends in processor architecture, especially massive multi-core processors for graphic cards...
Thilo Fester, Falk Schreiber, Marc Strickert
IJCNN
2008
IEEE
14 years 3 months ago
Wafer-scale integration of analog neural networks
Abstract— This paper introduces a novel design of an artificial neural network tailored for wafer-scale integration. The presented VLSI implementation includes continuous-time a...
Johannes Schemmel, Johannes Fieres, Karlheinz Meie...
IPPS
2007
IEEE
14 years 3 months ago
Porting the GROMACS Molecular Dynamics Code to the Cell Processor
The Cell processor offers substantial computational power which can be effectively utilized only if application design and implementation are tuned to the Cell architecture. In th...
Stephen Olivier, Jan Prins, Jeff Derby, Ken V. Vu
ISCAS
2006
IEEE
108views Hardware» more  ISCAS 2006»
14 years 3 months ago
A low complexity hardware architecture for motion estimation
This paper tackles the problem of accelerating The rest of this paper is organised as follows: section II motion estimation for video processing. A novel architecture details relat...
Daniel Larkin, Vlenti. Muresan, Noel E. O'Connor