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» The Power of Maximal Parallelism in P Systems
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IJHPCA
2010
105views more  IJHPCA 2010»
13 years 6 months ago
The Importance of Non-Data-Communication Overheads in MPI
With processor speeds no longer doubling every 18-24 months owing to the exponential increase in power consumption and heat dissipation, modern HEC systems tend to rely lesser on ...
Pavan Balaji, Anthony Chan, William Gropp, Rajeev ...
ICS
2009
Tsinghua U.
14 years 2 months ago
Parametric multi-level tiling of imperfectly nested loops
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...
Albert Hartono, Muthu Manikandan Baskaran, C&eacut...
SPAA
2009
ACM
14 years 8 months ago
The weakest failure detector for wait-free dining under eventual weak exclusion
Dining philosophers is a classic scheduling problem for local mutual exclusion on arbitrary conflict graphs. We establish necessary conditions to solve wait-free dining under even...
Srikanth Sastry, Scott M. Pike, Jennifer L. Welch
ICCD
1999
IEEE
110views Hardware» more  ICCD 1999»
13 years 11 months ago
TriMedia CPU64 Architecture
We present a new VLIW core as a successor to the TriMedia TM1000. The processor is targeted for embedded use in media-processing devices like DTVs and set-top boxes. Intended as a...
Jos T. J. van Eijndhoven, Kees A. Vissers, Evert-J...
ISQED
2010
IEEE
176views Hardware» more  ISQED 2010»
13 years 6 months ago
A 2-port 6T SRAM bitcell design with multi-port capabilities at reduced area overhead
Low power, minimum transistor count and fast access static random access memory (SRAM) is essential for embedded multimedia and communication applications realized using system on...
Jawar Singh, Dilip S. Aswar, Saraju P. Mohanty, Dh...