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» The Price of Routing in FPGAs
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TC
1998
13 years 7 months ago
Methodologies for Tolerating Cell and Interconnect Faults in FPGAs
—The very high levels of integration and submicron device sizes used in current and emerging VLSI technologies for FPGAs lead to higher occurrences of defects and operational fau...
Fran Hanchek, Shantanu Dutt
INFOCOM
2006
IEEE
14 years 1 months ago
Loss-Cognizant Pricing in Feed-Forward Networks with Greedy Users
— We consider feed-forward packet switched networks with fixed routing and random congestion losses. Users of the network are assumed to be greedy in the sense that each user in...
Ashraf Al Daoud, Murat Alanyali
PPL
2006
83views more  PPL 2006»
13 years 7 months ago
The Price of Anarchy for Restricted Parallel Links
In the model of restricted parallel links, n users must be routed on m parallel links under the restriction that the link for each user be chosen from a certain set of allowed lin...
Martin Gairing, Thomas Lücking, Marios Mavron...
ICCAD
2006
IEEE
115views Hardware» more  ICCAD 2006»
14 years 4 months ago
Thermal characterization and optimization in platform FPGAs
Increasing power densities in Field Programmable Gate Arrays (FPGAs) have made them susceptible to thermal problems. The advent of platform FPGAs has further exacerbated the probl...
Priya Sundararajan, Aman Gayasen, Narayanan Vijayk...
SASP
2009
IEEE
291views Hardware» more  SASP 2009»
14 years 2 months ago
FCUDA: Enabling efficient compilation of CUDA kernels onto FPGAs
— As growing power dissipation and thermal effects disrupted the rising clock frequency trend and threatened to annul Moore’s law, the computing industry has switched its route...
Alexandros Papakonstantinou, Karthik Gururaj, John...