283 search results - page 35 / 57 » The Price of Routing in FPGAs |
FPGA
1999
ACM
13 years 11 months ago
1999
ACM
In this paper, we investigate the speed and area-efficiency of FPGAs employing “logic clusters” containing multiple LUTs and registers as their logic block. We introduce a ne...
ASPDAC
2005
ACM
13 years 9 months ago
2005
ACM
Power has become an increasingly important design constraint for FPGAs in nanometer technologies, and global interconnects should be the focus of FPGA power reduction as they cons...
FPGA
2004
ACM
14 years 28 days ago
2004
ACM
In this work, we parameterize and explore the interconnect structure of pipelined FPGAs. Specifically, we explore the effects of interconnect register population, length of regist...
TCAD
2011
13 years 2 months ago
2011
Abstract—This work introduces GRIP, a global routing technique via integer programming. GRIP optimizes wirelength and via cost directly without going through a traditional layer ...
TELETRAFFIC
2007
Springer
14 years 1 months ago
2007
Springer
We study the capacity allocation problem in service overlay networks (SON)s with state-dependent connection routing based on revenue maximization. We formulate the dimensioning pro...