Sciweavers

5640 search results - page 1096 / 1128
» The Primacy of Process Architecture
Sort
View
RT
2001
Springer
14 years 1 months ago
Real-Time High Dynamic Range Texture Mapping
This paper presents a technique for representing and displaying high dynamic-range texture maps (HDRTMs) using current graphics hardware. Dynamic range in real-world environments o...
Jonathan Cohen, Chris Tchou, Tim Hawkins, Paul E. ...
HPCA
2000
IEEE
14 years 1 months ago
Impact of Chip-Level Integration on Performance of OLTP Workloads
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...
Luiz André Barroso, Kourosh Gharachorloo, A...
HPDC
2000
IEEE
14 years 1 months ago
Evaluation of Task Assignment Policies for Supercomputing Servers: The Case for Load Unbalancing and Fairness
While the MPP is still the most common architecture in supercomputer centers today, a simpler and cheaper machine configuration is growing increasingly common. This alternative s...
Bianca Schroeder, Mor Harchol-Balter
ICEIS
2000
IEEE
14 years 1 months ago
A Holistic Information Systems Strategy for Organisational Management-HISSOM
Alignment of organisational strategy with Information Systems Strategy (ISS) has become critical as adoption of Information Systems (IS) over the last 50 years has escalated. IS c...
David Lanc, Lachlan M. MacKinnon
MSS
2000
IEEE
160views Hardware» more  MSS 2000»
14 years 1 months ago
Implementation of a Fault-Tolerant Real-Time Network-Attached Storage Device
Phoenix is a fault-tolerantreal-time network-attachedstorage device (NASD). Like other NASD architectures, Phoenix provides an object-based interface to data stored on network-att...
Ashish Raniwala, Srikant Sharma, Anindya Neogi, Tz...
« Prev « First page 1096 / 1128 Last » Next »