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» The Primacy of Process Architecture
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DATE
2010
IEEE
163views Hardware» more  DATE 2010»
14 years 1 months ago
Efficient High-Level modeling in the networking domain
-- Starting Electronic System Level (ESL) design flows with executable High-Level Models (HLMs) has the potential to sustainably improve productivity. However, writing good HLMs fo...
Christian Zebelein, Joachim Falk, Christian Haubel...
PDP
2010
IEEE
14 years 1 months ago
Distributed Scheduler of Workflows with Deadlines in a P2P Desktop Grid
Scheduling large amounts of tasks in distributed computing platforms composed of millions of nodes is a challenging goal, even more in a fully decentralized way and with low overhe...
Javier Celaya, Unai Arronategui
FCCM
1999
IEEE
122views VLSI» more  FCCM 1999»
14 years 1 months ago
Safe and Protected Execution for the Morph/AMRM Reconfigurable Processor
Technology scaling of CMOS processes brings relatively faster transistors (gates) and slower interconnects (wires), making viable the addition of reconfigurability to increase per...
Andrew A. Chien, Jay H. Byun
FTDCS
1999
IEEE
14 years 1 months ago
Protecting Competitive Negotiation of Mobile Agents
The paradigm of mobile agents reached its popularity and attraction from typical application scenarios, which are located in the area of electronic commerce. In these common appli...
Hartmut Vogler, Axel Spriestersbach, Marie-Luise M...
HCW
1999
IEEE
14 years 1 months ago
An On-Line Performance Visualization Technology
We present a new software technology for on-line performance analysis and visualization of complex parallel and distributed systems. Often heterogeneous, these systems need capabi...
Aleksandar M. Bakic, Matt W. Mutka, Diane T. Rover